'Universal memory' research passes new milestone

[sman]

'Universal memory' research passes new milestone

This is a update of earlier article 'Discovery of a 'holy grail' with the invention of universal computer memory'

https://techxplore.com/news/2020-01-universal-memory-milestone.html

Physicists at Lancaster University have demonstrated that their invention of a new type of memory device could transform the way computers, smartphones and other gadgets work.

"Universal memory" is, in essence, a memory where the data is very robustly stored, but can also easily be changed; something that was widely considered to be unachievable—until now.

Currently, the two main types of memory, dynamic RAM (DRAM) and flash, have complementary characteristics and roles. DRAM is fast, so used for active (working) memory but it is volatile, meaning that information is lost when power is removed. Indeed, DRAM continually 'forgets' and needs to be constantly refreshed. Flash is non-volatile, allowing you to carry data in your pocket, but is very slow. It is well-suited for data storage but can't be used for active memory.

The article, published in the January edition of the journal IEEE Transactions on Electron Devices, shows how individual memory cellscan be connected together in arrays to make a RAM. It predicts that such chips would at least match the speed performance of DRAM, but do so 100 times more efficiently, and with the additional advantage of non-volatility.

This new non-volatile RAM, called ULTRARAM, would be a working implementation of so-called 'universal memory', combining all the advantages of DRAM and flash, with none of the drawbacks.

Professor Manus Hayne, who is leading the research, said: "The work published in this new paper represents a significant advance, providing a clear blueprint for the implementation of ULTRARAM memory."

The Lancaster team solved the paradox of universal memory by exploiting a quantum mechanical effect called resonant tunnelling that allows a barrier to switch from opaque to transparent by applying a small voltage.

The new work describes sophisticated simulations of this process; and proposes a readout mechanism for the memory cells that should improve the contrast between logical states by many orders of magnitude, allowing cells to be connected in large arrays. It also shows that the sharp transition between opacity and transparency of the resonant tunnelling barrier facilitates a highly compact architecture with a high bit density.

Ongoing work is targeted at the manufacturability of working memory chips, including fabrication of arrays of devices, development of readout logic, scaling of devices and implementation on silicon.